The copending application of L. Baranyai et. al. Ser. No. 391,698, filed June 24, 1982, now U.S. Pat. No. 4,481,624 issued Nov. 6, 1984 discloses a time division multiplex conferencer for continuously summing and outputting digital message samples received from n subscribers in n respective time slots. Message samples collected from each subscriber of a conference connection are summed during a first time frame and outputted during a second time frame. Besides establishing one or more conference-type connections between two or more subscribers, the conferencer also has the ability to establish broadcast and monitor connections.
In the conferencer, as in all signal processing systems, the avoidance of error is of major interest. Numerous techniques have been devised heretofore to reduce the probability of an error going undetected. The simplest and most widely used approach is the parity check method. A parity check bit is derived for each digital message sample and it is transmitted to the signal processor (e.g., the summing circuit of the conferencer) along with the respective message sample. A parity check circuit of conventional design can then be used to "flag" errors in the message samples delivered to the signal processor. However, faults may occur within the signal processor itself and an erroneous output(s) will thus be produced. In fact, the output can be in error even though a processor generated, parity bit might indicate otherwise.
Proper operation of a signal processor (e.g., conferencer summing circuit) can be verified by a brute force method. For example, test vectors can be sent to the processor in a dedicated time slot(s) to "exercise" the processor circuitry. For a 15-bit adder, this approach would require 2.sup.15 .multidot.2.sup.15 input sequences to the signal processor; and, of course, the resultant output sequences must be verified. Such an approach requires spearate testing apparatus and it takes one or more time slots out of service. Alternatively, a redundant processor arrangement can be used for verification purposes--but redundancy is costly.